1. Industrial Field of the Invention
The present invention relates to a structure of a thin film insulated gate field effect transistor, i.e., a so-called thin film transistor (TFT), and to a process for fabricating the same.
2. Prior Art
In a thin film device such as an insulated gate field effect transistor of a thin film type, i.e., a TFT, it is well known that the leak current between the source and the drain can be reduced by establishing the gate electrode, the source region, and the drain region offset from each another.
In the structure comprising the gate electrode, the source region, and the drain region in an offset state, the width of offset must be controlled with a high precision in the order of less than a submicron. For instance, a fluctuation in the offset width of 0.5 .mu.m or more is known to greatly change the characteristics of the resulting TFT. Accordingly, it is required in the fabrication of a TFT to control the offset length within a precision that an error is 0.1 .mu.m or less, and preferably, within a higher precision that an error is 500 .ANG. or less. Such a highly precise control in the offset width no longer can be achieved in the step of photolithography.
To overcome the problem above, a process as disclosed in Japanese patent application No. 3-237100 is proposed. The process comprises forming a gate electrode by using a material capable of being anodically oxidized, forming an anodic oxide at a thickness of 0.5 .mu.m or less with a precision that an error is 100 .ANG. or less around the gate electrode by anodic oxidation, and introducing an impurity by such processes as ion doping or ion implantation into the structure using the anodic oxide as the mask. Thus is established a structure with an offset state.
A known thin film device comprising the anodic oxide formed by a process above is shown in FIGS. 2(A) to 2(E). Typical structures are shown in FIGS. 2(A) and 2(C). FIG. 2(E) shows the upper view of the TFT. FIG. 2(A) is the cross section view along line A--A' of FIG. 2(E), i.e., the cross section view perpendicular to the gate electrode, and FIG. 2(C) is the cross section view along line B--B' of FIG. 2(E), i.e., the cross section view along a plane in parallel with the gate electrode.
Referring to FIG. 2(A), an island-like semiconductor coating 24 comprising an active region (a channel forming region) and impurity regions (source and drain)is provided on the substrate 22 having thereon a base insulating film 23. A gate insulating film 25 is provided further thereon. A gate electrode 26 surrounded by an anodic oxide 27 from the upper plane and the side planes is provided on the gate insulating film.
As mentioned in the foregoing, the impurity region (the hatched portion in the figure) can be provided offset from the gate electrode for a distance corresponding to the thickness x of the anodic oxide because the impurities are introduced into the semiconductor film 24 after anodically oxidizing the surrounding of the gate electrode. Thus, it can be seen that the anodic oxide on the side of the gate electrode is required for establishing the gate electrode offset from the impurity regions. The anodic oxide provided on the upper plane is necessary to surely insulate the interconnection of the gate electrode from the upper interconnection. Thus, a dense and pore-free anodic oxide having a high resistivity must be established.
In general, the leak current decreases with increasing offset length. An anodic oxide having a thickness of 0.2 .mu.m or more, and preferably, 0.4 .mu.m or more is required to obtain a sufficiently low leak current.
However, such a thick anodic oxide can only be obtained by applying a sufficiently high voltage for anodic oxidation. Conventionally, a voltage as high as 400 V or even higher was necessary for the anodic oxidation to form a pore-free anodic oxide having a thickness of 0.4 .mu.m. When such a high voltage is applied, however, a part of the applied voltage is loaded between the semiconductor film 24 and the gate electrode 26 as to cause the gate insulating film 25 to undergo permanent breakdown or to increase the density of states at the boundary. Thus, prior art devices were often found to result with low product yield and poor reliability.
In case the gate electrode is made of, for instance, aluminum, an anodic oxide having a thickness of 0.4 .mu.m is obtained by oxidizing an aluminum film having a thickness of about 0.2 .mu.m. This signifies that the aluminum film which is provided as the gate electrode should have a thickness of 0.2 .mu.m or more, and preferably, a thickness of 0.4 .mu.m or more. For instance, if an initial aluminum film is provided at a thickness of 0.4 .mu.m, and if an anodic oxide is formed thereafter at a thickness of 0.4 .mu.m, an aluminum gate electrode having 0.2 .mu.m in thickness results as shown in FIG. 2(B). This signifies that the gate electrode together with the anodic oxide film amounts to a thickness of 0.6 .mu.m. In general, a step height of 0.5 .mu.m or less is required to increase the product yield. From this point of view, it can be said that the case above violates the general rule. Moreover, considering that the substantial height of the interconnection is 0.2 .mu.m, the increased resistance impairs the characteristics of the TFT.
To the knowledge of the present inventors, the step portion 9 in FIG. 2(D) is subject to a vigorous anodic oxidation. Thus, as shown in FIG. 2(D), the interstices tend to be completely oxidized by the anodic oxidation which may sometimes lead to establish a substantial disconnection.